Fast Boolean Optimization by Rewiring

Transcription

1 Fst Booln Optimiztion y Rwiring Shih-Chih Chng Ntionl Chung-Chng Univrsity, Jy-Yi, Tiwn R.O.C. Luks P.P.P. vn Ginnkn Synopsys In. Mountin Viw, Cliforni Mlgorzt Mrk-Sowsk Univrsity of Cliforni t Snt Brr This ppr prsnts vry ffiint Booln logi optimiztion mtho. Th ooln optimiztion is hiv y ing n rmoving runnt wirs in iruit. Our lgorithm pplis th rsoning of Automti Tst Pttrn Gnrtion (ATPG) whih n tt runny ffiintly. During th ATPG pross, mntory ssignmnts r ssignmnts whih must stisfi. Our lgorithm nlyzs iffrnt hrtristis of mntory ssignmnts uring th ATPG pross. Nw thortil rsults s on th nlysis r prsnt whih l to signifint prformn improvmnts. Th fst run tim n th xllnt sling to lrg prolms mk our Booln optimiztion mtho prtil for inustril pplitions. Exprimnts show tht th optimiztion rsults r omprl to thos of [11] whil th run tim is two orrs of mgnitu fstr (vrg 126x sp up). Furthrmor, w rport optimiztion rsults for svrl lrg xmpls, whih wr prviously thought to too lrg to hnl y Booln optimiztion mthos. 1 Introution Logi synthsis is stp tht rlizs st of logi xprssions using lls from thnology lirry. Usully, th ojtivs in logi synthsis r to optimiz r, ly, powr n tstility. Among logi optimiztion lgorithms, Automti Tst Pttrn Gnrtion (ATPG) s optimiztions [2] [3] [4] [5] [11] [15] [16] [17] r oming vry populr us of th following vntgs. First of ll, ATPG s lgorithms rquir littl mmory to pross lrg iruits. Although th running tim of ATPG lgorithm my xponntil, th mmory rquirmnt is linr in th siz of th iruit. Th mount of ffort spnt in running fult tsts n urtly ontroll. ATPG s lgorithms hv goo filur hrtristis; whn th lgorithm orts, this os not imply tht th ntir lgorithm ns to ort, s is th s with most BDD s lgorithms. In ition, ATPG optimiztions n impliitly us iruit osrvility n ontrollility on t rs without th n to xpliitly lult thm. On of ATPG s strngths is th ility to tt ffiintly runnt wirs in iruit. As rsult, most ATPG s lgorithms hiv optimiztion y ing n rmoving runnt onntions in iruits. For xmpl, [11] s on runnt wir n thn rmovs runnt wirs us y th prvious hng. Ar optimiztion n hiv y ing on n rmoving mny wirs in iruit. Anothr ATPG s lgorithm [3] trgts som prtiulr wir. Th lgorithm tris to rmov trgt wir y ing to th iruit nothr st of wirs. Rmoving som ritil wir n vry usful for mny pplitions. For xmpl, on my rmov wir in th ritil pths to improv ly. [6] rmovs wir to improv prtitioning. In FPGA, [3] rmovs unroutl wirs ftr routing. It s routl wirs to orrt n unroutl FPGA iruit. Th motivtion of this ppr is to stlish thortil kgroun for th singl wir ition n rmovl [3][4][5]. W invstigt som nssry onitions for wir to runnt. Using ths onitions, w r l to improv th rsults n sp up th run tim of mny ATPG s lgorithms. Two ssntil issus r rss in this ppr: 1. Whih wirs n rmov ftr ing nw runnt wir? 2. Whih nw runnt wir, whn, will mk th xisting trgt wir runnt? W stuy th hrtristis of mntory ssignmnts [1], whih must stisfi for vry tst vtor. W isuss two vry importnt onpts, for n osrvility mntory ssignmnts, whih r us to istinguish mong mntory ssignmnts. Ths two ttriuts of mntory ssignmnts n omput long with th lultion of mntory ssignmnts. Vry littl omputtionl ovrh is rquir to trmin ths two itionl ttriuts. Bs on ths, w riv thorms tht improv th rsults of ATPG s optimiztions. 2 An xmpl In this stion, w illustrt som si onpts whil wlking through n xmpl from [11]. This ppr first intifis tht thr is runnt wir ->m (ott in th FIG- URE 1) whih n to th iruit. Aing this wir ->m uss two originlly irrunnt wirs ->g n ->f (ott) to om runnt. To tt th runny of - >f n ->g, [11] pplis runny rmovl to th ntir iruit. Th rwks of this thniqu r two fol. First, ICCAD /96 $ ΙΕΕΕ

2 running th runny rmovl on th ntir iruit rquirs normous CPU tim for ig iruits. In ition, thr is no hint of whih wir shoul sin no informtion is vill. In this ppr, our first st of thorms provi nssry onitions for wirs to runnt ftr ing nothr wir. For xmpl, in FIGURE 1, suppos w onsir to runnt wir ->m. With propr nlysis of mntory ssignmnts whn tting th runny of ->m, w n quikly trmin tht {h->z, ->z, g->h, f->h, ->g, ->, ->f} nnot runnt. This lvs only {->f, - >, ->g} s possil nits for runny hking if ->m is. Finlly, w n only to prform th runny tst on ths thr wirs. Th runny informtion f f g g () () FIGURE 1 Runnt wirs us y ing nothr out ths wirs not only n ru th run tim ut lso n irt th optimiztion to hoos goo runnt nit for ing. Anothr ontriution of this ppr is to sp up n improv th rsults of fining ltrntiv wirs [3][4]. A singl ltrntiv wir of trgt wir is wir whos ition n mk th trgt wir runnt. For xmpl, in th FIGURE 2, ftr ing th wir g 5 -> g 9 n rmoving th wir g 1 ->g 4, th iruit s funtion rmins th sm. g 5 ->g 9 is singl-ltrntiv wir for g 1 ->g 4. In this ppr, w will vlop mthos tht llow us y prforming th stuk-t fult tst of g 1 ->g 4 to onlu tht ny mong wirs, ->g 9, ->g 8, ->g 9, g 2 ->g 4, g 2 ->g 8, g 2 - >g 9, g 7 ->g 4, g 7 ->g 9, f->g 4 n f->g 8, nnot possily n ltrntiv for g 1 ->g 4. Thrfor, w n skip th runny tst for thos wirs. This will sustntilly ru th pu run tim in omprison to th lgorithms in [4]. This ppr is orgniz s follows: Stion 3 rviws som onpts in tsting tht w will using in this ppr. Stion 4 introus two ttriuts of mntory ssignmnt, h h m x y x z y z f g 1 g 2 g 3 g 4 g 5 o 1 g 6 g7 g 8 g 9 o 2 () f nmly for MAs n osrvility MAs. Stion 5 rivs som nssry onitions for runny of wir. Stion 6 givs nssry n suffiint onitions for wir to n ltrntiv wir. Stion 7 sris n ffiint implmnttion of th lgorithm of [4], using th thorms of th prvious two stions. Finlly rsults n onlusions r prsnt. 3 Bkgroun n Dfinitions In th following, w rviw som stnr logi synthsis trminology n ATPG rlt onpts whih will us throughout th ppr. Hr w only onsir iruits onsisting of AND, OR n INV gts. Complx gts n hnl y omposing thm into AND, OR n INV gts. A Booln ntwork is irt yli grph whr h no is ssoit with Booln funtion f i, n Booln vril y i. Thr is wir irt from no n i to no n j if th funtion f j pns on th vril y i. Th omintors [10] of wir W is st of gts G suh tht ll pths from W to ny primry output hv to pss through ll gts in G. Th vlu of n input to gt is si to ontrolling if it trmins th vlu of th gt s output rgrlss of th vlus of th othr inputs; th ontrolling vlu is 1 for n OR or NOR gt, n 0 for n AND or NAND gt. Th invrs of th ontrolling vlu is ll th nonontrolling vlu or snsitizing vlu. Consir th omintors of wir W. Th si inputs of omintor r its inputs not in th trnsitiv fnout of th wir W. To gnrt tst for stuk-t fult t wir W, ll si inputs of th wir W s omintors must ssign thir snsitizing vlus. For wir stuk-t-1 {0} fult tst, tst vtor must gnrt 0 {1} t th sour no of th wir. W rfr th 0 {1} t th sour no of th wir s n tivting vlu for th tst. Lt w r wir ing tst for stuk-t 0 {1} fult; fulty iruit is th iruit in whih w r is rpl y onstnt 0 {1}. An input omintion v is tst vtor if n output of th goo iruit n fulty iruit r iffrnt whn g 1 g 2 g 3 g 4 g 5 g 6 g7 g 8 o 2 () FIGURE 2 An xmpl for singl ltrntiv wir. g 9 o 1

3 pplying v. If no suh tst vtor xists, thn th wir unr stuk-t fult tst is runnt. Th mntory ssignmnts (MA) r th vlu ssignmnts to nos rquir for tst to xist n must stisfi y ny tst vtor. Th pross of omputing ths mntory ssignmnts n hking thir onsistny is rfrr to s implition [1]. Th pross of implition is s follows. Th MAs on th si inputs of omintor r st to snsitizing vlus n th MA on th sour no of th trgt wir is st to th tivting vlu. Ths MAs n thn propgt y using som simpl ruls suh s if th output of AND {OR} gt is 1 {0}, th inputs r 1 {0}. If ll th inputs of n AND {OR} gt r 1 {0}, th output is 1 {0} t. [1]. This pross is ll irt implition. Mor MAs n foun y mor omplit pprohs suh s rursiv lrning [12]. If th mntory ssignmnts of stuk-t fult tst nnot onsistnt, th fult is untstl n thrfor, th wir is runnt. A wir to rmov is rfrr to s th trgt wir. Th orrsponing stuk-t fult is ll th trgt fult. 4 For mntory ssignmnts n osrvility mntory ssignmnts In this stion, w isuss two vry importnt onpts, osrvility mntory ssignmnts n for mntory ssignmnts. Ths two onpts r us to form th kon of our thorms. As mntion in stion 3, MA of stuk-t fult n riv from MAs tht tivt th fult or snsitiz fult propgting pth to on primry output. Dfinition 1: During stuk-t fult tst for w r = n s ->n, w fin MA to n osrvility MA if th MA must st to snsitiz fult propgting pth to on primry output. Th osrvility MAs r mntory ssignmnts whih r nssry to mk th fult osrvl t primry output. Th osrvility MA is riv from MAs tht snsitiz th omintors ut xluing th fft of th tivting MA. Th osrvility MAs r sust of ll th MAs. Not tht sin th tivting vlu os not ply rol, th osrvility MAs o not pn on th sour no n s of w r For xmpl, in th Fig 2(), th osrvility MAs for g 1 ->g 4 r {=1, g 2 =0, g 7 =0, f=1}. Not tht MAs {g 1 =0, g 5 =0} r not osrvility MAs us thy n to riv from th tivting MA. Now w fin th for MA. Lt n no in th iruit C. Suppos ftr stuk-t fult tst, n hs MA. In th s of fiv-vlu logi [1], th MA n 0, 1, D or D. W uil th nw iruit C (n) s follows. If th MA is 1 or D, isonnt n from its fnouts n onnt thos fnouts to onstnt 0. If th MA is 0 or D, w onnt thos fnouts to onstnt 1. S FIGURE 3. (Th rson why D n D r insrting iffrnt vlu n foun in [3].) Dfinition 2: Suppos no n hs MA ftr prforming stuk-t fult tst in C. W sy tht n hs for MA in C if whn w prform th sm stuk-t fult tst in C (n), th fult oms untstl. w n 0 n w 1 n FIGURE 3 (). w is th wir on whih th stukt fult tst is prform on. () shows C (n) if n hs n MA=1 or. () shows C (n) if th no hs n MA=0 or. For MAs n sn s MAs whih r rquir for th fult to tstl. Moifying th iruit strutur to hng for MA will us onflit n will mk th fult untstl. Non-for MAs r u to n inintl onsqun of th tst, ut hnging th iruit strutur to hng non-for MA will not mk th originl fult untstl. For xmpl in FIGURE 2(), onsir th g 1 ->g 4 stuk-t-1 tst. W hv MA={g 1 =0, =1, g 2 =0, g 5 =0, g 7 =0, f=1}. =1 is for MA us isonnting with g 4 n insrting 0 t n input of g 4 will mk th stuk-t fult untstl. Th MA g 5 =0 is non-for. It is so us ftr isonnting g 5 n o 1 n onnting o 1 to 1, g 1 ->g 4 is still tstl. Aoring to th finition of for MA, th MAs on th omintors r ll for. This is us putting onstnt vlu t omintor mks th trgt fult untstl. This finition suggsts pris wy of fining for mntory ssignmnts in stuk-t fult tst. Howvr, in rlity, omputing whthr MA is for pplying th finition irtly is vry tim-onsuming. In th following, w isuss how ths for MAs n lult in prti. During th pross of irt implition, if th output of n AND {OR} gt is 1 {0}, ll th inputs must 1 {0}. W rfr to this pross s kwr implition. Lmm 1: Th MAs otin y stting si inputs of omintors to non-ontrolling vlus n th tivting MA on w

4 th sour no of th trgt fult r for. In ition, th MAs otin y kwr propgtion r lso for. Proof. This thorm follows irtly from th finition of for MA. QED Lmm 1 suggsts tht whthr MA is for n trmin whil prforming irt implition. Thrfor, no itionl tst is rquir to i whthr MA is for or not. For xmpl, in FIGURE 2(), lt us onsir g 1 ->g 4 stuk-t-1. W hv {=1, g 7 =0, f=1} s for MAs us thy r th si inputs of omintors, n {g 2 =0, g 5 =0} s not for MAs us thy r otin from forwr propgting othr MAs. MAs n lso riv from rursiv lrning whih pplis irt implition rursivly. If MA is otin from rursiv lrning, on n lso us th notion of kwr implition to i whthr it is for MA. In this ppr, w o not isuss fining for MAs in rursiv lrning. Intuitivly, for MA is th MA tht must mintin for th fult to tstl. If for MA is hng, th fult oms untstl. For xmpl in FIGURE 2(), g 9 ( omintor) hs for MA in th g 1 ->g 4 s--1 tst. If runnt wir g 5 ->g 9 is to th iruit, th MA of g 9 is hng to 0. As rsult, g 1 ->g 4 is runnt ftr ing g 5 ->g 9. 5 Wirs nnot possily runnt ftr ing on runnt wir n s w r n () MA=0 A runnt wir is wir tht w n /rmov from th iruit without hnging th iruit s hvior. Aing runnt wir to iruit my rsult in runny of othr wirs. In th following, w xplin how to us th onpts of for MA n osrvility MA to intify whthr prtiulr wir n runnt ftr ing nothr runnt onntion. Two ssumptions r m in this ppr: First, th iruit unr onsirtion is irrunnt, tht is, no wir in th iruit is runnt. This ssumption of irrunny is vry importnt in our proofs. W will using ths thorms s filtrs to srn out wirs tht r not possil to runnt. As rsult, whn th iruit in onsirtion ontins som runnt wirs, pplying ths thorms my fil to srn out som wirs, using unnssry work to prform. Th son ssumption is tht w only onsir ing runnt wir n hking whthr nothr wir n rmov iniviully. W o not onsir possiility of fining two simultnously runnt wirs [4]. Two wirs r simultnously runnt if w n on n rmov th othr simultnously ut w nnot or rmov ithr of thm iniviully. Without losing gnrlity, lt us onsir ing runnt wir w r = n s -> n to n AND gt in n irrunnt iruit C in FIGURE 4(). Sin w r is runnt, omputing th MA of th w r s--1 tst is inonsistnt. Bus of this inonsistny, th MAs in th iruit r mninglss. Th following thorms n lmms show whih wirs nnot om runnt ftr ing runnt wir. Lmm 2: Th osrvility MAs for th runt wir w r =n s ->n must onsistnt in th iruit C. Proof. Lt n n AND {OR} gt. Suppos th osrvility MAs r inonsistnt. Any nw onntion whih os not xist in C tht fnins to n is runnt wir. Thrfor, onstnt 0 {1} tht fnins to n is lso runnt. W n thn onlu tht n n rpl y onstnt 0 {1} whih ontrits our irrunny ssumption. QED. Lmm 3: Lt n n AND {OR} gt. Th wir w r =n s -> n is runnt, if n only if n s hs n osrvility MA=1 {0} for w r stuk-t fult tst. (A similr thorm is shown in [11].) Proof. Lt us omput osrvility MAs for w r first. Bs on Lmm 2, ths osrvility MAs r onsistnt. Thn, ssign 0 {1}, th tivting vlu, t th n s. Sin w r is runnt, th MAs r inonsistnt. Thrfor, whn omputing osrvility MAs, n s must hv h n osrvility MA=1 {0}. QED Not tht osrvility MAs on t pn on th sour of th trgt fult. In FIGURE 1, th osrvility MAs for (ny no)->m stuk-t-1 tst r {=1, h=1}. Sin =1, - >m is runnt wir. For nothr xmpl, in FIGURE 2, suppos w know tht g 5 ->g 9 is runnt wir. Whn omputing osrvility MAs for (ny no)->g 9, sin ssigning g 5 =0 will us onflit (g 5 ->g 9 is runnt), g 5 must hv 1. Lt (C w r ) not iruit C with n wir w r n (C\w r ) iruit C from whih th wir w r hs n rmov. Suppos n irrunnt wir w t in C oms runnt ftr ing runnt wir w r = n s -> n. Lmm 4: w r oms irrunnt ftr rmoving w t in (C w r \w t ). m z () FIGURE 4 Aing runnt wir w r in n irrunnt iruit. n

5 Proof. If w r is still runnt ftr rmoving w t, w t is runnt without ing w r. This onflits with our originl ssumption tht C is irrunnt. QED. Lmm 5: For th w r stuk-t fult tst, th osrvility MA t n s in C is iffrnt from (C w r \w t ). Proof. If th n s hs th sm osrvility MA, w r is still runnt ftr rmoving w t. This ontrits Lmm 4 QED. For xmpl, in FIGURE 1, osrvility MAs for - >m r {=1, h=1}. Suppos w rmov ->g. Th osrvility MA is {h=1}. Th osrvility MA t is iffrnt. Thrfor, ftr rmoving ->g, th wir ->m is no longr runnt. As w mntion in th finition, w onsir th omputtion of MAs from ithr irt implition or rursiv lrning. Thorm 6: Suppos osrvility MAs r omput for runnt wir w r. A wir in (C w r ) is not runnt if th wir is not visit uring th pross of omputtion of osrvility MAs for w r, Proof. Rmoving thos wirs will not hng th osrvility MA t n s sin without thos wirs w n still hv th sm osrvility MA t n s. QED Exmpl 1: in FIGURE 1(), lt us onsir to runnt wir ->m (m is highlight AND gt). Whn omputing osrvility MAs for ->m, w first st h=1 to propgt fult D from m to ny output. Sin h=1, ithr no g=1 or no f=1. If g=1, {=1, =1}. If f=1, {=1, =0, =1}. As rsult, w onlu tht =1 n ->m is runnt wir. During th omputtion, th wirs ->z n m->z r nvr visit. Thrfor, w lso onlu tht ing ny runnt wir to no m, th wirs ->z, n m->z will not runnt. In this xmpl, w n to pply rursiv lrning to otin =1 from h=1. Sin h=1, w try g=1 or f=1. All th wirs {g->h, f->h, ->f, ->f, ->g, ->g, ->, ->} tht r trvrs from ithr of th hois {g=1, f=1}. Our thorms in th followings r ppli for h hoi sprtly n th rsults r umult to otin informtion on ll possil runnt wirs. For xmpl, whn g=1, w trvrs {g->h, ->g, ->g}. whn f=1, w trvrs {f->h, - >f, ->, ->f, ->} Thorm 7: All th irt input wirs of n AND {OR} gt r not runnt in (C w r ) if th AND {OR} gt hs n osrvility n for MA=0 {1} for w r in C. Proof. Without loss of gnrlity, lt us onsir twoinput AND gt whih hs for MA=0. S Figur 4. Thr r thr possiility of MAs t th inputs of n AND gt. Thos r (m, n) = (1, 0), (0, 0), (X, X). W isuss thm sprtly n prov tht rmoving ithr on of th input wirs on th AND gt will not hng th osrvility MA t n s. Cs 1: (m, n) = (0, 0). Rmoving ithr m->z or n->z will not hng ny MAs in th iruit so m->z n n->z r not runnt ftr ing w r. Cs 2: (m, n) = (1, 0). m->z is not runnt us of th sm s s 1. Consir omputing th osrvility MAs for w r ftr rmoving n->z. Thr will onflit sin z hs for MA 0 n m hs vlu of 1. Thrfor, ftr rmoving n->z, w r is still runnt. This violts our originl irrunny ssumption. Cs 3: (m, n) = (x, x). Th MA z=0 implis (m, n) = (0, x) or (x, 0). Assuming (m, n) = (0, x) or (x, 0) will not hng othr MAs in th iruits. Thrfor, rmoving m->z or n->z will not hng osrvility MAs. Th wirs m->z n n->z r not runnt. QED. Lt us rturn to Exmpl 1. Sin th h hs osrvility for MA=1, th wirs g->h n f->h r not runnt. Th possil runnt wirs r {->f, ->f, ->g, ->g, - >, ->} Thorm 8: A wir w=(n x, n z ) is not runnt in (C w r ) if n z is AND {OR} gt n n x hs n osrvility MA of 1 {0} for w r. Proof. Th proof is similr to th ov thorm us osrvility MAs will not hng ftr rmoving th wir. QED. Agin, lt us look t Exmpl 1. Whn onsiring f=1, w hv =1 n =0. Aoring to th ov thorm, w know tht -> nnot runnt. Th possil runnt wirs r {->f, ->f, ->g, ->g, ->}. Thorm 9: Lt no n z n AND {OR} gt n on of its input wirs is (n x, n z ). If n x hs n osrvility MA of 0 {1} for w r, ll othr input wirs of n z r not runnt in (C w r ). Proof. It is th sm s th ov. QED Thorm 10: During rursiv lrning, if wir os not ontriut to ny MA, th wir nnot runnt. w t n s MA=0 FIGURE 5 Fin singl ltrntiv wir for w t In Exmpl 1, sin ->f n ->g o not us tht =1. Thrfor thy nnot runnt. As rsult, th possil runnt wirs r {->f, ->g, ->}. w r n

6 In summry, in FIGURE 1, onsir to th runnt wir ->m: 1. From thorm 6, th wirs {->z, m->z} nnot runnt. 2. From thorm 7, th wirs {g->h, f- >h} nnot runnt. 3. From thorm 8, th wirs {- >} nnot runnt. 4. From thorm 10, th wirs {- >f, ->g} nnot runnt. 6 Singl ltrntiv wir Singl ltrntiv wir is onpt propos in [3]. A singl ltrntiv of trgt wir is runnt wir whos ition n mk th trgt wir runnt. For xmpl, in FIGURE 2, if w th wir g 5 ->g 9, thn, th wir g 1 ->g 4 oms runnt. In this s, w sy th g 5 ->g 9 is singl ltrntiv wir for g 1 ->g 4. In this stion, w first rviw th prour tht fins singl-ltrntiv wirs for wir. Thn, w show th nssry n suffiint onition for runnt wir to singl-ltrntiv wir for th trgt wir. In ition, w lso propos n improv vrsion of th prour. This nw prour improvs th qulity s wll s th run tim of fining singl-ltrntiv wirs. Lt us onsir rmoving trgt wir w t y ing runnt wir w r to th iruit. Th wy of rmoving th trgt wir w t is to mk w t stuk-t fult tst to om untstl [3]. For xmpl, in Fig. 5, suppos w woul lik to rmov w t n w r =n s -> n is not prsnt in th iruit now. Lt us onsir w t stuk-t fult tst. n s is no tht hs MA=0, n n is omintor of w t. If th wir w r is prsnt in th iruit, th vlu of 0 will for MA=0 on n. Th MA=0 on n loks th fult propgtion n mks th w t stuk-t fult untstl n runnt. Thrfor if w r is prsnt in th iruit, w t is runnt. Howvr, ing w r my hng iruit s funtion so w n to mk sur tht w r is runnt wir. In summry, th prour of fining ltrntiv wirs for w t is s follows. First, w omput th MAs for th w t stuk-t fult tst. Sonly, ollt st of nit onntions tht n lok th fult propgtion. Finlly, hk if nit onntion is runnt. g 2 g 1 o 1 g 3 g 5 o 2 f g 4 o 3 () g 3 g 5 o 2 f g 4 o 3 () g 2 g 1 FIGURE 6 Anothr xmpl of singl-ltrntiv wir. ->g 2 is singl ltrntiv wir for g 1 ->g 5. o 1 For xmpl, in Figur 6, to rmov ->g 2, w first omput th stuk-t-1 fult for ->g 2. W hv {=0, =1, =1, =0, g1=0, =1, g 4 =1}. Thn, w fin tht g 1 ->g 5 is nit onntion to lok th fult propgtion. Finlly, w hk th runny of g 1 ->g 5. Sin it is runnt, w sy g 1 ->g 5 is n ltrntiv wir for ->g 2. Th ov prour shows wy to fin n ltrntiv wir for th trgt wir w t. Thr is no informtion out whthr w r fining ll possil ltrntiv wirs for wir or not. Not tht our gol is to mk th trgt wir untstl. Bloking th fult propgtion is not th only wy of hiving this. Hr, w show nssry n suffiint onition (Thorm 13) for runt wir to n ltrntiv wir for th trgt wir w t. Thorm 11: If w r =n s -> n is n ltrntiv wir for w t, n s must hv mntory ssignmnt 0 {1} for th stuk-t fult tst of w t n n is n AND {OR} gt. Proof. Suppos n s os not hv MA. Som tst vtors for w t stuk-t fult will gnrt 0 n othr tst vtors gnrt 1 t th n s. Suppos n is n AND {OR} gt. Aftr ing w t, tst vtor tht gnrts 1 {0} t th n s is still tst vtor for w t ftr ing w r. As rsult if n s os not hv n MA, thn ftr ing w r, w t is still not runnt. Thrfor, w r is not n ltrntiv wir for w t. Using th sm rgumnt, w n lso show tht n must n OR gt whn n s =1 n AND gt whn n s =0. QED Thorm 12: If w r = n s -> n is n ltrntiv wir for w t, n AND {OR} gt n must hv for mntory ssignmnt 1 or D {0 or D} for th stuk-t fult tst of w t in C. Proof. Aoring to Thorm 11, n s must hv MA=0 {1} whn n is n AND {OR} gt. Sin w t is runnt in (C w r ), th MAs of w t stuk-t fult is inonsistnt. Thrfor, n must hv MA. Aoring to th finition of for MA, this MA must for. QED. Thorm 13: A runnt wir w r =n s -> n is n ltrntiv wir for w t, if n only if n AND {OR} gt n hs for MA=1 or D {0 or D} n n s hs MA=0 {1} for th stuk-t fult tst of w t. Proof. Th if prt n prov y th finition of for MA. Th only if prt follows irtly from th prvious two thorms. QED For xmpl in Fig.6. sin g 1 ->g 5 is n ltrntiv wir for ->g 2. ->g 2 must lso n ltrntiv wir for g 1 ->g 5. W now onsir th iruit in Fig.6() n try to rmov g 1 - >g 5 y ing ->g 2. Aftr omputing g 1 ->g 5 s--1 tst, w hv MA={g 1 =0, =0, =0, g 3 =1, =1, o3=1, g 2 =1, =1, =1}. Sin g 2 =1 is for MA, w n try to wir to violt th MA. Thn, in th son stp, w fin tht ->g 2 is nit onntion to rmov g 1 ->g 5. Sin ->g 2 is runnt, ->g 2 is n ltrntiv wir for g 1 ->g 5. Th ov prour improvs th qulity of th originl fining singl ltrntiv wirs prour [3]. In th following, w show wy to improv th ffiiny. Not tht

7 7 Implmnttion n n y w t n x w r n s (osrvility MA=0) () n y w t n x FIGURE 7 Osrvility MA is not usful to fin singl ltrntiv wirs. in [3] thr r svrl thorms rlt to ffiiny improvmnt. Th isussion hr is quit iffrnt from thos in [3]. Aoring to Thorm 8, sour no n s of w r =n s -> n must hv MA. In th following, w show th osrvility MAs r not usful. Not tht osrvility MAs r sust of th MAs. Thorm 14: If n s hs n osrvility MA for w t stuk-t fult tst, w r =n s -> n nnot n ltrntiv wir for w t =n x -> n y. Proof. Prov y ontrition. Without losing gnrlity, lt us ssum tht n is n AND gt in FIGURE 7. Suppos w r is n ltrntiv wir for w t n n s hs n osrvility MA. Sin osrvility MAs r inpnnt to th tivting vlu, ing w r, w n rpl w t with onstnt 1 or 0 us of s--1 n s--0 r untstl. Lt us onsir ing w r n rpl w t with onstnt 1. Aoring to Lmm 4, w r oms n irrunnt wir ftr rpling w t with onstnt 1 in (C w r \w t ) in FIG- URE 7. In ition, in (C w r \w t ), w t is n ltrntiv wir for w r. Lt us onsir ing w t to rmov w r. Aoring to Thorm 11, n x hs MA=0 n n y hs for MA 1 or D. Now if w insrt 0 to th input of n, th stuk-t fult tst for w r will om runt us n hs for MA 1 or D. On th othr hn, sin w r is n ltrntiv wir for rpling w t y onstnt 0, w r oms irrunnt ftr th rplmnt. This onflits with th prvious rgumnt. Thrfor, n s shoul not hv n osrvility MA. QED. For xmpl in FIGURE 6, to fin singl ltrntiv for ->g 2, th MAs for ->g 2 stuk-t-1 tst r {=1, =1, =0, g 3 =1, =1, g 4 =1, =0, g 1 =0}. Among th MAs, {=1, =1, =0, g 3 =1, =1, g 4 =1} r th osrvility MAs. Thrfor, to fin singl ltrntiv wir tht fnins to g 5, w only n to onsir th nit onntion of {->g 5, g 1 ->g 5 }. n w r () Th implmnttion of our lgorithm is s on th lgorithm riv in [4]. This lgorithm os Booln optimiztion s on ltrntiv wirs. W us our thorms to furthr sp up this lgorithm. S FIGURE 8 for psuo-o of our lgorithm. Our lgorithm trvrss ll nos of th ntwork. Eh no is onsir s stintion no n of nwly runnt wir w r. Our gol is to fin sour no n s suh tht th wir w r = n s ->n n rmov st of wirs w t of mximum ost. S [4] for tils on this optimiztion. Th gol of this ppr is to mk th srh for n s mor ffiint. forh no n in th iruit { fin th osrvility MA of n ; /* th osrvility MA on t pn on th sour*/ for h wir w t in th fnin n fnout on of n i { Us Thorm 7, 8, 9, n 10 n to skip wirs w t whih nnot possily om runnt; Clult th MA of w t Us Thorm 12 to hk if wir n to n to mk w t runnt Fill sour_rry with nos whih hv n MA using Thorm 11 Us Thorm 14 to prun sour_rry optimiz th iruit s in [4] FIGURE 8 Th lgorithm Th lgorithm strts with lulting th osrvility MAs for n. Not tht this n on, vn if n s is not yt known. From ths osrvility MAs w n trmin tht som wirs nnot possily runt, using Thorm 7, Thorm 8, Thorm 9, n Thorm 10. Susquntly w lult th MAs for ll w t whih pss this tst. Now, using Thorm 12 w hk if n is suitl to mk w t runnt. To fin ll possil sour nos n s for th ltrntiv wir n s ->n to rpl w t, hr is simpl prour. Aftr omputing th w t stuk-t fult MA s, w put no whih hs n MA into sour_rry. W n thn us Thorm 14 to hk whthr nit wir is n ltrntiv wir y hking whthr it is runnt, n whthr th MA s r onfliting. Sin th proofs os not mk n ssumption tht ll implitions shoul foun, ll thorms hol vn prtil implitions r us. Th tul implmnttion only uss thos implitions whih r sy to omput. 8 Exprimntl Rsults Tl 1 omprs th optimiztion of SIS1.1, HANNI- BAL n ours (trm rwir) for som nhmrk iruits. Sin our iruits r in th form of AND n OR gt, w post-pross thos iruits with l; swp; l; simplify

8 (whih r ommns in SIS) n ompr th ftor litrl ount with SIS n HANNIBAL. Column 2 shows th run tim for Hnnil n olumn 3 shows th run tim for our implmnttion. Column 4, 5 n 6 shows th rsults of SIS, HANNIBAL n ours in trms of litrl ount. Among thos iruits in th tl, our lgorithm is 126 tims fstr thn th lgorithm of HANNIBAL. Th litrl ounts r out th sm twn ours n Hnnil s. Th first stion of th tl lists n omprs th iruits rport in [11]. Th rminr of th tl lists som itionl iruits. 9 Conlusions As monstrt in th tl, our implmnttion is muh fstr thn th optimiztion lgorithm of [11], with omptitiv rsults. Furthr sp improvmnts r possil, us our implmnttion i not us Thorm 6. From th rsults on som vry lrg iruits, suh s s38417, w n s tht our pproh sls wll. Th ov thorms r pplil to othr ATPG s optimiztions s wll. It sms likly tht th lgorithms of [2] [3] [5] [11] [15] [17] n tk vntg of our thorms to sp up run tim. 10 Rfrns [1] M. Armovii, M.A. Brur, A.D. Frimn, Digitl Systms Tsting n Tstl Dsign, Computr Sin Prss, [2] C. L. Brmn n L. H. Trvillyn. Glol Flow Optimiztion in Automti Logi Dsign, IEEE Trns. CAD 10, pp , My [3] S. C. Chng, K. T. Chng, N.S. Woo n M. Mrk-Sowsk Lyout Drivn Logi Synthsis for FPGA, Pro. Dsign Automtion Conf. pp , Jun 1994 [4] S. C. Chng, M. Mrk-Sowsk Prtur n Simplify, Multi-lvl logi optimizr, Digst Int. Conf. on Computr Ai Dsign, pp.2-5, Nov [5] K. T. Chng n L. A. Entrn, Multi-Lvl Logi Optimiztion y Runny Aition n Rmovl, in Pro. Europn Confrn On Dsign Automtion, pp , F [6] D. I. Chng, C. C. Lin n M. Mrk-Sowsk, Ciruit Prtitioning with Logi Prturtion, in Pro. Int. Confrn on Computr Ai Dsign, pp., , Nov [7] M. Dmini, J. C. Y. Yng n G. D Mihli, Optimiztion of Comintionl Logi Ciruits Bs on Comptil Gts, Pro. Dsign Automtion Conf., pp , Jun [8] L. A. Entrn n K. T. Chng, Squntil Logi Optimiztion By Runny Aition n Rmovl, Pro. Int. Conf. on Computr Ai Dsign, Nov [9] M. Higshi, J. Ishikw, M. Hirmin, K. Nomur, Multilvl Logi Optimiztion Bs on Psuo Mximum Sts of Prmissil Funtions, Europn Dsign Automtion Conf., pp , [10] T. Kirkln n M. R. Mrr, A Topologil Srh Algorithm For ATPG, Pro. Dsign Automtion Conf., pp , Jun [11] W. Kunz n D.K. Prhn, Multi-Lvl Logi Optimiztion y Implition Anlysis, Digst Int. Conf. on Computr Ai Dsign, pp. 6-13, Nov [12] W. Kunz n D. K. Prhn, Rursiv Lrning: An Attrtiv Altrntiv to th Dision Tr for Tst Gnrtion for Digitl Ciruits, in Pro. Int. Tst Conf., pp , Ot [13] S. Murog t l, Th Trnsution Mtho-Dsign of Logi Ntworks Bs on Prmissil Funtions, IEEE Trnstion. on Computr C38(10). pp Ot [14] M. Shulz n E. Auth, Avn Automti Tst Pttrn Gnrtion n Runny Intifition Thniqus, Pro. Fult Tolrnt Computing Symp., pp , Jun [15] B. Rohflish, B. Wurth, K. Antrih Logi Clus Anlysis for Dly Optimiztion, Pro. DAC, 1995, pp [16] M. R. C. M. Brklr, L. P. P. P. vn Ginnkn: Effiint Orthonormlity Tsting for Synthsis with Pss-Trnsistor Sltors, Digst Int. Conf. on Computr Ai Dsign, pp , Nov [17] M. Yuguhi, Y. Nkmur, K. Wkyshi, T. Fujit Multi- Lvl Minimiztion s on Multi-Signl Implitions, pro. DAC, 1995, pp TABLE 1 Hnnil pu (s) Rwir pu (s) SIS ooln (lits) Hnnil (lits) Rwir (lits) Ciruits C C C C C C C C C sutotl rltiv s s s s lu lu trm too_lrg ttt z4ml f51m frg totl rltiv